1. Field of the Invention
The present invention relates to a method for fabricating thin-film transistors, and more particularly, to a method for fabricating thin-film transistors by a lift-off process.
2. Description of the Prior Art
Due to the continued development in technology, flat display panels have been widely used in various information products. Among the various types of flat display panels, thin-film transistor liquid crystal displays (TFT-LCDs) are developed maturely. Because TFT-LCDs have qualities of light weight, thinness, low energy requirements, and no radiation, they have been widely used in portable information products, such as notebooks and personal digital assist (PDA) computers, and even replaced the conventional traditional cathode ray tube (CRT) monitors gradually. The main electric elements of a TFT-LCD are thin-film transistors arranged as an array. In operation with appropriate capacitors and conducting pads, the thin-film transistors drive liquid crystal pixels for producing colorful images, and therefore a thin-film transistor is one of the key elements affecting the image quality of a TFT-LCD.
A thin-film transistor has a gate electrode, a source, a drain, and a semiconductor layer for forming a channel of the transistor. A typical fabrication process of a conventional thin-film transistor has to perform five photolithography processes, which means five photomasks need to be used for defining the patterns of the thin-film transistor. However, since the costs of photomask seriously affect the fabrication costs of display panels, a new fabrication process of thin-film transistors array by using four photomasks, including at least a half-tone mask, has been researched in order to reduce the fabrication costs.
With reference to FIGS. 1-4, FIGS. 1-4 are schematic diagrams of the fabrication process of a thin-film transistor by using four photomasks according to the prior art. As shown in FIG. 1, a first conductive layer and a photoresist layer are formed on the transparent substrate 10 in order. Then, a first photolithography-etching process (PEP) is performed to form a gate electrode 12 and a wire pattern 14.
As shown in FIG. 2, an insulation layer 16, a semiconductor layer 18, an ohmic contact layer 20, a second conductive layer 22, and a photoresist layer 24 are sequentially formed on the surface of the transparent substrate 10. Then, as shown in FIG. 3, a half-tone mask 26 is used to perform a second photolithography process for patterning the photoresist layer 24, wherein the half-tone region of the half-tone mask 26 corresponds to the predetermined channel region above the gate electrode 12.
Referring to FIG. 4, the patterned photoresist layer 24 is taken as an etching mask to sequentially perform a wet etching process and a dry etching process to the transparent substrate 10 for removing portions of the semiconductor layer 18, the ohmic contact layer 20, and the second conductive layer 22 so as to from a semiconductor island 32, a source 28, and a drain 30. Finally, several deposition processes and a third and a fourth PEP processes are performed to form a passivation layer and a pixel electrode electrically connecting to the drain 30 on the transparent substrate 10 so that the fabrication of the thin-film transistor and pixel electrode of each pixel or each sub-pixel is finished.
As mentioned above, the prior-art fabrication method of thin-film transistors uses the half-tone mask during the second PEP process by taking its half-tone region to define the channel pattern of the thin-film transistor. Because the size of the channel pattern of the thin-film transistor is very detailed and minute, the half-tone mask for defining the channel pattern by its half-tone region has to be very accurate, whose formation cost is very high and is twice as the formation cost of normal photomask. Therefore the process cost is very high by using the half-tone mask. In addition, once a defect of the transference of the channel pattern occurs during the second PEP by using a half-tone mask, it will seriously affect the electric property of the thin-film transistor, which is hard to be repaired. Furthermore, according to the prior-art process of fabricating a thin-film transistor, both of the source and drain patterns cover the semiconductor layer so that photo current is easily induced since most materials of the semiconductor layer are amorphous silicon materials that have photo sensitivity, and photo current affects the electrical performance of the thin-film transistor.
For solving the above-mentioned problem of photo current, Wang et al. provide an U.S. Pat. No. 6,998,640 to disclose another method for fabricating thin-film transistors with island-in structure. Referring to FIG. 5, Wang et al. teach forming a first conductive layer 210, an insulation layer 220, a semiconductor layer 230, an ohmic contact layer 240, and a photoresist layer 241 successively on the surface of the transparent substrate 200, and performing a photolithography-etching process to pattern the thin films. Then, as shown in FIG. 6, a chemical vapor deposition (CVD) process is performed to form an insulation layer on the whole transparent substrate 200 to cover the surface of the transparent substrate 200 for forming the passivation layer 250b and to cover the photoresist layer 241 for forming the passivation layer 250a. Finally, as shown in FIG. 7, a lift-off process to the photoresist layer 241 is performed with removing the passivation layer 250a simultaneously to complete the fabrication of the semiconductor island. Thereafter, other elements, such as the source and drain, may be formed on the surface of the semiconductor island to finish fabricating the thin-film transistor structure.
However, since general photoresist material will have solvent volatile issue when the temperature reaches 50° C., and will decompose when the temperature reaches 130° C. Furthermore, according to the process of the disclosure of Wang et al., the passivation layer 250a formed on the photoresist layer 241 is fabricated by a CVD process, and the process temperature of conventional CVD processes is more than 280° C. Therefore, when the transparent substrate 200 with the photoresist layer 241 thereon is transferred into the CVD chamber for forming the passivation layers 250a, 250b, the photoresist layer 241 easily decomposes to contaminate the CVD chamber. Accordingly, the patent of Wang et al. has the problem that it is not practicable in practical fabrication processes, and the method taught by Wang et al. cannot be applied to the manufacturers or mass productions of display panels.
As mentioned above, how to fabricate thin-film transistors by practicable processes with low costs to avoid the photo current problem is still an important issue for the manufactures.